Floating nano-dot MOS capacitor memory arrays without cell transistors

摘要

A new non-volatile crossbar memory array concept based on floating nano-dot MOS capacitors without cell selection transistors is presented. The memory stack consists of a quasi-metallic silicon layer, a slightly doped silicon layer, a tunnel oxide, floating silicon nano-dots, a control oxide film and a metallic top contact. These memory elements are placed between the crossbar wires. The information is stored in the MOS structures as a variable-capacitance state associated to the charging state of nano-dots. Appropriate voltage selection strategies are demonstrated in order to address individual bits. Experimental test arrays are fabricated using a self-organizing nano-dot deposition process. Electrical measurements provide evidence for single cell read/write capabilities.