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Sensitivity of single- and double-gate MOS architectures to residual discrete dopant distribution in the channel

机译:单栅和双栅MOS架构对通道中残留离散掺杂剂分布的敏感性

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The effect of a single discrete impurity in the channel of Fully-Depleted Single- and Double-Gate MOSFETs is analyzed by means of 3D Monte Carlo simulation. The Double-Gate (DG) architecture appears to be less sensitive to the dopant perturbation than the Single-Gate (SG) counterpart. For an N-channel device the influence of a P-type impurity on the current-voltage characteristics is shown to be strongly dependent on the impurity position in the channel. The maximum current degradation is obtained for an impurity located about 5 nm from the source-end of the channel. The I_(on) reduction reaches 6% in DG and 10.5% in SG. A small current enhancement (less than 2%) is induced by an N-type impurity. These results are analyzed in terms of velocity profile between source and drain.
机译:通过3D蒙特卡洛模拟分析了全耗尽型单栅极和双栅极MOSFET沟道中单个离散杂质的影响。与单门(SG)相比,双门(DG)架构对掺杂剂扰动似乎不那么敏感。对于N沟道器件,显示出P型杂质对电流-电压特性的影响很大程度上取决于沟道中的杂质位置。对于位于距沟道源端约5 nm处的杂质,可获得最大电流衰减。 DG的I_(on)降低达到SG的10.5%。 N型杂质引起小电流增强(小于2%)。根据源极和漏极之间的速度曲线分析了这些结果。

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