机译:短沟道双金属栅(DMG)全耗尽型凹源极/漏极(Re-S / D)SOI MOSFET的分析亚阈值电流和亚阈值摆幅模型
Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela 769008, India;
Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela 769008, India;
Department of Electronics Engineering, Indian Institute of Technology (Banaras Hindu University), Varanasi 221005, India;
Faculty of Electronics and Communication Engineering, Sriramswaroop Memorial University, Lucknow 22003, UP, India;
Department of Electronics Engineering, Indian Institute of Technology (Banaras Hindu University), Varanasi 221005, India;
Department of Electronics and Communication Engineering, National Institute of Technology, Rourkela 769008, India;
Recessed-source/drain (Re-S/D); Dual-metal-gate (DMG); Fully-depleted silicon-on-insulator (FD-SOI) MOSFET; Subthreshold current and swing;
机译:用于完全耗尽的(FD)凹槽源/漏极(RE-S / D)SOI MOSFET的分析亚阈值电流和亚阈值摆幅模型,具有后门控制
机译:短通道双金属栅(DMG)隐式源/漏(Re-S / D)SOI MOSFET的分析阈值电压模型
机译:超短沟道嵌入式源极/漏极(Re-S / D)SOI MOSFET的弹道亚阈值电流模型
机译:基于ATLAS™的双金属栅(DMG)全耗尽(FD)隐式源/漏(Re-S / D)SOI MOSFET电气特性的仿真研究
机译:使用BSIM3v3进行超低功耗电路设计的MOSFET亚阈值区域建模。
机译:具有位置载流子散射相关性的准弹道漏电流电荷和电容模型对纳米级对称DG MOSFET有效
机译:完全耗尽的源极/漏极UTB SOI MOSFET亚阈值特性的建模和仿真,包括衬底引起的表面电势效应