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首页> 外文期刊>Journal of Computational Electronics >Underlap channel silicon-on-insulator quantum dot floating-gate MOSFET for low-power memory applications
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Underlap channel silicon-on-insulator quantum dot floating-gate MOSFET for low-power memory applications

机译:适用于低功耗存储应用的下叠沟道绝缘体上硅绝缘量子点浮栅MOSFET

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We propose herein the underlap channel silicon-on-insulator (SOI) quantum dot (QD) floating-gate (und-SOIQDFG) metal-oxide-semiconductor field-effect transistor (MOSFET). It is found that, although the reduced effective gate voltage due to the voltage drop across the underlap lengths reduces the on-state drive current (), the increased effective channel length due to the underlap at the gate-source/drain reduces not only the short-channel effects, gate-induced drain leakage, and off-state leakage current () but also the parasitic overlap capacitances of the proposed und-SOIQDFG device. Furthermore, in comparison with the conventional QD floating-gate (conv-QDFG) MOSFET, the capacitive coupling ratio and memory window of the proposed device are improved by and %, respectively. Furthermore, the ratio for the proposed device is improved while the static power dissipation is significantly reduced compared with the conv-QDFG device. This clearly shows that use of the gate-source/drain underlap in the quantum dot floating-gate MOSFET not only eliminates potential weaknesses of the device but also makes it suitable for low-power nanoscale flash memory applications.
机译:我们在此提出了一种重叠沟道绝缘体上硅(SOI)量子点(QD)浮栅(und-SOIQDFG)金属氧化物半导体场效应晶体管(MOSFET)。已经发现,尽管由于跨接段长度上的电压降而导致的有效栅极电压减小,从而减小了导通状态驱动电流(),但是由于栅-源极/漏极处的接续段而导致的有效沟道长度的增加不仅减小了导通电流。建议的und-SOIQDFG器件的短沟道效应,栅极感应的漏极泄漏和截止状态泄漏电流()以及寄生重叠电容。此外,与传统的QD浮栅(conv-QDFG)MOSFET相比,该器件的电容耦合率和存储窗口分别提高了5%和5%。此外,与conv-QDFG器件相比,该器件的比例得到了改善,同时静态功耗大大降低。这清楚地表明,在量子点浮栅MOSFET中使用栅极-源极/漏极下重叠不仅消除了该器件的潜在弱点,而且使其适用于低功率纳米级闪存应用。

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