A novel laminated gate to improve the ON-state resistance of LDMOS transistors

摘要

A novel power transistor structure, namely the laminated gate laterally diffused metal-oxide-semiconductor (LG-LDMOS) structure, is proposed herein. The proposed structure has an extra lateral gate located in the middle of the channel region in addition to the fin-shaped gate. This technique provides additional inversion channels. In this way, the channel resistance is reduced and also the power losses decrease due to improved gate control on the channel. The ON-state resistance of the proposed structure is improved by 52 % compared with a LDMOS structure with fin-shaped gate (Fin-LDMOS).