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Calculation of on-state I-V characteristics of LDMOSFETs based on an accurate LDD resistance modeling

机译:基于精确LDD电阻模型的LDMOSFET导通状态I-V特性计算

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摘要

In this paper, we present an I-V model for LDMOSFETs. It is based on modeling the Lightly-Doped Drain (LDD) region of the device as voltage-controlled resistors where velocity saturation effect is also taken into account. Using the LDD region model along with a model for the channel region of the device, the on-state I-V characteristic of the transistor is accurately calculated. The models for the LDD region resistors can be incorporated into a circuit simulator such as HSPICE which has an accurate model for the channel region of the transistor. The accuracy of the models is verified by comparing its results with those of a device simulator. The results show a maximum error of 1% for a wide range of voltages and overlapped LDD region lengths.
机译:在本文中,我们提出了LDMOSFET的I-V模型。它基于将器件的轻掺杂漏极(LDD)区域建模为压控电阻器,其中还考虑了速度饱和效应。使用LDD区域模型和器件的沟道区域模型,可以精确计算晶体管的导通状态I-V特性。可以将LDD区域电阻器的模型合并到电路仿真器(例如HSPICE)中,该电路仿真器具有晶体管沟道区域的准确模型。通过将模型结果与设备模拟器的结果进行比较,可以验证模型的准确性。结果表明,对于宽范围的电压和重叠的LDD区域长度,最大误差为1%。

著录项

  • 来源
    《Superlattices and microstructures》 |2012年第3期|560-576|共17页
  • 作者单位

    Nanoelectronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran;

    Nanoelectronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran;

    Nanoelectronics Center of Excellence, School of Electrical and Computer Engineering, University of Tehran, Tehran, Iran;

    School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    LDMOSFET; LDD resistance; I-V characteristics; Analytical modeling;

    机译:LDMOSFET;耐LDD;I-V特性;分析建模;

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