Switched Current Circuit using Fixed Gate-Potential Transistor and Automatic Tuning Circuit

摘要

Clock feedthrough (CFT) error is one of the most important problems for switched current (SI) circuits. This paper proposes a SI circuit which can reduce CFT error drastically. The proposed circuit will theoretically reduce both signal-dependent and independent errors by using CMOS switches under a fixed and appropriate bias. Although conventional circuits based on a similar idea need operational amplifiers or additional capacitors, the circuit proposed in this paper requires only MOSFETs.