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Speed optimized diode-triggered SCR (DTSCR) for RF ESD protection of ultra-sensitive IC nodes in advanced technologies

机译:速度优化的二极管触发SCR(DTSCR),用于先进技术中的超灵敏IC节点的RF ESD保护

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摘要

A novel diode-triggered silicon-controlled rectifier (DTSCR) (Mergens et al., 2003) electrostatic discharge (ESD) protection element is introduced for low-voltage application (signal and supply voltages /spl les/ 1.8 V) with extremely narrow ESD design margins. Trigger-voltage engineering in conjunction with fast and efficient SCR voltage clamping is applied for the protection of ultrasensitive circuit nodes, such as SiGe heterojunction bipolar transistor (HBT) base regions (e.g., f/sub Tmax/=45 GHz in BiCMOS 0.35-/spl mu/m LNA input) and thin gate oxides (e.g., t/sub ox/=1.7 nm in CMOS 0.09-/spl mu/m high-speed input). Ultrathin gate protection requires a reinforced trigger diode chain to avoid SCR trigger-speed issues resulting in critical trigger-voltage overshoots for very fast ESD transients such as a charged device model (CDM). SCR integration can be realized based on parasitic n-p-n/p-n-p inherent to CMOS devices or can alternatively be implemented based on vertical high-speed SiGe HBT with adjacent p+ SCR anode.
机译:推出了一种新型的二极管触发可控硅整流器(DTSCR)(Mergens等人,2003)静电放电(ESD)保护元件,用于低压应用(信号和电源电压/ spl les / 1.8 V),且ESD极窄设计余量。触发电压工程与快速有效的SCR电压钳位相结合,可用于保护超灵敏电路节点,例如SiGe异质结双极晶体管(HBT)基极区域(例如,BiCMOS 0.35- /中的f / sub Tmax / = 45 GHz) spl mu / m LNA输入)和薄栅氧化层(例如,CMOS 0.09- / spl mu / m高速输入中的t / sub ox / = 1.7 nm)。超薄栅极保护需要增强的触发二极管链,以避免SCR触发速度问题,从而在非常快的ESD瞬变(例如,充电设备模型(CDM))中导致严重的触发电压过冲。 SCR集成可以基于CMOS器件固有的寄生n-p-n / p-n-p来实现,也可以基于具有相邻p + SCR阳极的垂直高速SiGe HBT来实现。

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