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Electrical Characterization of BEOL Plasma-Induced Damage in Bulk FinFET Technology

机译:BEOL等离子体诱导散装FINFET技术损伤的电气特征

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Due to the small size of the transistors affected by plasma-induced damage (PID), the electrical characterization of this effect is challenging. In this paper, dc characteristics, breakdown measurements and charge pumping results are combined to extract information about the impact of PID occurring during BEOL processing in an advanced bulk FinFET technology. The effect of PID is visible on the threshold voltage and the transconductance, but not on the gate current and the subthreshold swing, suggesting that fixed charges are responsible for this degradation rather than trap creation. This is confirmed with time-dependent dielectric breakdown measurements. Nonetheless, charge pumping measurements demonstrate that PID increases the density of traps by a factor 1.78, even though the absolute density of traps remain too low to affect significantly the dc characteristics of the transistors.
机译:由于等离子体诱导损伤(PID)影响的晶体管的尺寸小,因此这种效果的电学表征是具有挑战性的。在本文中,DC特性,击穿测量和电荷泵送结果被组合以提取有关PID在高级散装FinFET技术中发生PID冲击的信息。 PID对阈值电压和跨导的影响,但不在栅极电流和亚阈值摆动上可见,表明固定电荷负责这种降级而不是陷阱创建。通过时间相关的介电击穿测量来确认这一点。尽管如此,电荷泵测量结果表明PID增加了因子1.78的捕集密度,即使陷阱的绝对密度保持太低而无法显着影响晶体管的直流特性。

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