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An Analytical Approach for Error PMF Characterization in Approximate Circuits

机译:近似电路中误差PMF表征的解析方法

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Approximate computing has emerged as a circuit design technique that can reduce system power without significantly sacrificing the output quality in error-resilient applications. However, there exists only a few approaches for systematically and efficiently determining the error introduced by approximate hardware units. This paper focuses on the development of error analysis techniques for approximate circuits consisting of adders and multipliers, which are the key hardware components used in error-resilient applications. A novel algorithm has been presented, using the Fourier and the Mellin transforms, that efficiently determines the probability distribution of the error introduced by approximation in a circuit, abstracted as a directed acyclic graph. The algorithm is generalized for signed operations through two’s complement representation, and its accuracy is demonstrated to be within 1% of Monte Carlo simulations, while being over an order of magnitude faster.
机译:近似计算已成为一种电路设计技术,它可以降低系统功耗,而又不会显着降低容错应用中的输出质量。但是,仅存在几种系统地和有效地确定由近似硬件单元引入的错误的方法。本文重点研究了由加法器和乘法器组成的近似电路的误差分析技术的发展,这是在抗错应用中使用的关键硬件组件。使用傅里叶变换和梅林变换,提出了一种新颖的算法,该算法可以有效地确定电路中由逼近引入的误差的概率分布,抽象为有向无环图。该算法可通过二进制补码表示形式用于有符号运算,并且其精度已证明在Monte Carlo模拟的1%范围内,但速度要快一个数量级。

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