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A Low Active Leakage and High Reliability Phase Change Memory (PCM) Based Non-Volatile FPGA Storage Element

机译:基于低主动泄漏和高可靠性相变存储器(PCM)的非易失性FPGA存储元件

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摘要

The high leakage current has been one of the critical issues in SRAM-based Field Programmable Gate Arrays (FPGAs). In recent works, resistive non-volatile memories (NVMs) have been utilized to tackle the issue with their superior energy efficiency and fast power-on speed. Phase Change Memory (PCM) is one of the most promising resistive NVMs with the advantages of low cost, high density and high resistance ratio. However, most of the reported PCM-based FPGAs have significant active leakage power and reliability issues. This paper presents a low active leakage power and high reliability PCM based non-volatile SRAM (nvSRAM). The low active leakage power and high reliability are achieved by biasing PCM cells at 0 V during FPGA operation. Compared to the state-of-the-art, the proposed nvSRAM based 4-input look up table (LUT) achieves 174 times reduction in active leakage power and 15000 times increase in retention time. In addition, the proposed nvSRAM-based FPGA system significantly accelerates the loading speed to less than 1 ns with 2.54 fJ/cell loading energy.
机译:高泄漏电流一直是基于SRAM的现场可编程门阵列(FPGA)的关键问题之一。在最近的工作中,电阻式非易失性存储器(NVM)已被利用其出色的能源效率和快速的开机速度来解决该问题。相变存储器(PCM)是最有前途的电阻NVM之一,具有低成本,高密度和高电阻比的优点。但是,大多数已报道的基于PCM的FPGA都有明显的有源泄漏功率和可靠性问题。本文提出了一种低有源泄漏功率和高可靠性的基于PCM的非易失性SRAM(nvSRAM)。通过在FPGA工作期间将PCM单元偏置为0 V,可以实现低有源泄漏功率和高可靠性。与最新技术相比,建议的基于nvSRAM的4输入查找表(LUT)可将有效泄漏功率降低174倍,并将保留时间提高15,000倍。此外,所提出的基于nvSRAM的FPGA系统以2.54 fJ /单元的加载能量将加载速度显着提高到不到1 ns。

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