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Phase-change-memory-based storage elements for configurable logic

机译:基于相变内存的可配置逻辑存储元素

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Back-end-of-line non-volatile resistive memories like Phase Change Memories (PCMs) are promising to solve memory issues in different architectures. In this paper, we investigate the usage of PCM to build an elementary configuration memory node for reconfigurable logic, such as Field-Programmable Gate Arrays (FPGAs). We propose an elementary circuit realized by 2 resistive memories and 1 programming transistor able to store a configuration voltage. We investigate the proposed node in terms of area and write time and we assess its impact on complex circuits. We show that the elementary memory node yields an improvement in area and write time of 1.5x and 16x respectively vs. a regular Flash implementation. Implemented in FPGAs, the memory node yields a delay reduction up to 51%, thanks to the reduction of dimensions and low on-resistance of PCMs.
机译:像相变存储器(PCM)这样的后端非易失性电阻式存储器有望解决不同体系结构中的存储器问题。在本文中,我们研究了PCM用于构建可重配置逻辑(例如现场可编程门阵列(FPGA))的基本配置存储节点的用法。我们提出了一种基本电路,该电路由2个电阻性存储器和1个能够存储配置电压的编程晶体管实现。我们根据面积和写入时间调查建议的节点,并评估其对复杂电路的影响。我们显示,与常规Flash实施相比,基本存储节点的面积和写入时间分别提高了1.5倍和16倍。由于采用了尺寸减小且PCM的导通电阻较低,因此在FPGA中实现的存储节点可将延迟降低多达51%。

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