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Clock Jitter Analysis of Continuous-Time $SigmaDelta$ Modulators Based on a Relative Time-Base Projection

机译:基于相对时间的连续时间 $ Sigma Delta $ 调制器的时钟抖动分析基础投影

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This paper presents a novel approach to analyze clock jitter influence in the performance of continuous-time sigma-delta modulators. The analysis is based on projecting all the signals and operations over an artificial time-base relative to the sampling clock, on which the sampling period can be considered constant. In the proposed time-base, clock jitter can be modeled as the modulation of the input signal frequency and the integrators gain. Unlike standard techniques, we do not rely on the feedback pulse properties, which enables a broader application of our technique to band-pass or VCO-based Sigma Delta modulators. In this paper, we present the basic theory of this technique and its application to some practical examples, showing a good matching between prediction and numerical simulation.
机译:本文提出了一种新颖的方法来分析时钟抖动对连续时间sigma-delta调制器性能的影响。该分析基于相对于采样时钟在人工时基上投影所有信号和操作,在采样时基上可以认为采样周期是恒定的。在提出的时基中,可以将时钟抖动建模为输入信号频率和积分器增益的调制。与标准技术不同,我们不依赖于反馈脉冲属性,这使我们的技术可以更广泛地应用于带通或基于VCO的Sigma Delta调制器。在本文中,我们介绍了该技术的基本理论及其在一些实际示例中的应用,显示了预测和数值模拟之间的良好匹配。

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