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首页> 外文期刊>Formal Methods in System Design >Static Analysis for State-Space Reductions Preserving Temporal Logics
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Static Analysis for State-Space Reductions Preserving Temporal Logics

机译:状态空间归约保留时间逻辑的静态分析

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In this paper we present two methods that use static analysis of parallel programs to create reduced models for them. Our algorithms examine the control-flow graph of a program (the syntax) and create a smaller transition system than would have been created otherwise. The smaller transition system is equivalent to the original transition system of the program with respect to temporal logic specifications. The two methods are orthogonal in their approach. The first, called path reduction, reduces the state-space by compressing computation paths. This method reduces the number of steps each computation takes. The second method, called dead variable reduction, reduces according to the variable domains. It identifies classes of equivalent states which differ only on variable values (and not the program counter) and uses a representative for each class. We also consider a refinement of the dead variable reduction, based on partially dead variables, which may result in a greater reduction. Our algorithms are based on syntactic manipulation of expressions, thus enabling us to handle programs with variables over finite as well as infinite domains. Both methods can easily be combined with either explicit state or symbolic methods (and with each other). We used the Murphi verifier to test the amount of reduction achieved by both methods. We let Murphi perform a DFS search and compared the sizes of the original and reduced transition systems, for several examples and according to both reductions. The results show that path reduction and the reduction based on partially dead variables give significant reductions, while the effect of fully dead variables is less impressive. We discuss the differences between the approaches, and the reasons for these results.
机译:在本文中,我们介绍了两种使用静态分析并行程序来为其创建简化模型的方法。我们的算法检查程序的控制流图(语法),并创建一个比其他方式创建的过渡系统小的系统。就时间逻辑规范而言,较小的转换系统等效于程序的原始转换系统。这两种方法的方法是正交的。第一种称为路径缩减,它通过压缩计算路径来减少状态空间。此方法减少了每次计算要执行的步骤。第二种方法称为无效变量归约,它根据变量域进行归约。它标识仅在变量值(而不是程序计数器)上不同的等效状态的类,并为每个类使用一个代表。我们还考虑了基于部分死变量的死变量减少的细化,这可能会导致更大的减少。我们的算法基于对表达式的句法操作,因此使我们能够处理有限域和无限域中具有变量的程序。两种方法都可以轻松地与显式状态或符号方法(以及彼此)组合。我们使用Murphi验证程序来测试通过两种方法实现的减少量。我们让Murphi执行DFS搜索,并比较了原始示例和简化过渡系统的大小,其中包括几个示例,并根据这两种简化情况进行了比较。结果表明,路径减少和基于部分失效变量的降低明显减少了,而完全失效变量的效果却不那么令人印象深刻。我们讨论了这些方法之间的差异以及产生这些结果的原因。

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