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Pessimism Reduction in Coupling-Aware Static Timing Analysis Using Timing and Logic Filtering

机译:使用时序和逻辑过滤的可感知耦合的静态时序分析中的悲观主义减少

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摘要

With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been proposed, the results are often pessimistic with many false failures. We present an integrated iterative timing filtering and logic filtering based approach to reduce pessimism. We use a realistic coupling model based on arrival times and slews, and show that non-iterative pessimism reduction algorithms proposed in previous research may give potentially non-conservative timing results. On a functional block from an industrial 65 nm microprocessor, our algorithm produced a maximum pessimism reduction of 11.18% of cycle time over converged timing filtering analysis that does not consider logic constraints.
机译:随着技术不断地扩展到纳米范围,耦合引起的延迟变化的影响是显着的。虽然已经提出了几种可识别耦合的静态计时器,但结果往往是悲观的,有许多错误的错误。我们提出了一种基于迭代时序过滤和逻辑过滤的集成方法,以减少悲观情绪。我们使用基于到达时间和斜率的逼真的耦合模型,并证明了先前研究中提出的非迭代悲观减少算法可能会给出潜在的非保守时序结果。在工业65 nm微处理器的功能块上,与不考虑逻辑约束的融合时序滤波分析相比,我们的算法在周期时间上的最大悲观度降低了11.18%。

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