A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation

摘要

An approach for modeling hot-electron induced change in drain current that significantly improves the ease of parameter extraction and provides new capabilities for modeling the effect of bidirectional stressing and the asymmetrical I-V characteristics after stressing is presented. The change in the drain current, Delta I/sub D/ is implemented as an asymmetrical voltage-controlled current source and the new Delta I/sub D/ model is independent of the MOSFET model used for circuit simulation. The physical basis of the model, the analytical model equations, the implementation scheme in BERT (BErkeley Reliability Tools) simulator and simulation results for uni- and bidirectional circuit stressing are presented.