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Design and Fabrication of High-Performance Polycrystalline Silicon Thin-Film Transistor Circuits on Flexible Steel Foils

机译:柔性钢箔上高性能多晶硅薄膜晶体管电路的设计与制作

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This paper discusses in detail the design and fabrication process for the realization of high-performance polycrystalline silicon thin-film transistors and digital CMOS circuitry on thin flexible stainless steel foils. A comprehensive approach to substrate preparation is first presented. For transistor fabrication, distinct processing approaches are examined, such as solid-phase and excimer laser crystallization for the active semiconductor region, thermal growth and chemical vapor deposition for the gate insulator, and others. It is shown that process optimization has resulted in the fabrication of CMOS transistors with field-effect mobility values in the region of 200 cm{sup}2/V·s and I{sub}(ON)/I{sub}(OFF) current ratios of at least seven orders of magnitude. The design and performance of high-speed digital CMOS is addressed, and the effects of the conductive foil through parasitic capacitive coupling are examined. CMOS inverter blocks in ring oscillator circuits operating with delay times as low as 1.12 ns are reported, as well as static and dynamic shift registers operating in the megahertz regime.
机译:本文详细讨论了在柔性不锈钢薄板上实现高性能多晶硅薄膜晶体管和数字CMOS电路的设计和制造过程。首先介绍了一种全面的底物制备方法。对于晶体管制造,研究了不同的处理方法,例如,有源半导体区域的固相和准分子激光结晶,栅极绝缘体的热生长和化学气相沉积等。结果表明,工艺优化导致了场效应迁移率值在200 cm {sup} 2 / V·s和I {sub}(ON)/ I {sub}(OFF)范围内的CMOS晶体管的制造。电流比率至少为七个数量级。讨论了高速数字CMOS的设计和性能,并研究了导电箔通过寄生电容耦合的影响。据报道,环形振荡器电路中的CMOS反相器模块以低至1.12 ns的延迟时间工作,以及以兆赫兹形式工作的静态和动态移位寄存器。

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