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4H–SiC Lateral Double RESURF MOSFETs With Low on Resistance

机译:具有低导通电阻的4H–SiC横向双RESURF MOSFET

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Designing and fabrication of 4H-SiC (0001) lateral MOSFETs with a double reduced surface field (RESURF) structure have been investigated to reduce ON resistance. In order to achieve high breakdown voltage, a two-zone RESURF structure was also employed in addition to the double RESURF structure. The simulated double RESURF MOSFETs with optimum doses exhibit slightly higher breakdown voltage and lower drift resistance than the simulated single RESURF MOSFETs. The double RESURF structure is attractive to suppress oxide breakdown at gate edge. After the device simulation for dose optimization, the 4H-SiC two-zone double RESURF MOSFETs have been fabricated by using a self-aligned process. The fabricated MOSFET has demonstrated a high breakdown voltage of 1380 V and a low ON resistance of 66 mOmegamiddotcm2 (including a drift resistance of 24 mOmegamiddotcm2). The drift resistance of the fabricated double RESURF MOSFETs is only 50% or even lower than that of the single RESURF MOSFETs
机译:为了减小导通电阻,已经研究了具有双减小表面场(RESURF)结构的4H-SiC(0001)横向MOSFET的设计和制造。为了获得高击穿电压,除了双RESURF结构之外还采用了两区RESURF结构。具有最佳剂量的模拟双RESURF MOSFET与模拟单个RESURF MOSFET相比,具有更高的击穿电压和更低的抗漂移性。双重RESURF结构对于抑制栅极边缘的氧化物击穿很有吸引力。在针对剂量优化进行器件仿真之后,已经通过使用自对准工艺制造了4H-SiC两区双RESURF MOSFET。制成的MOSFET表现出1380 V的高击穿电压和66 mOmegamiddotcm2的低导通电阻(包括24 mOmegamiddotcm2的漂移电阻)。制成的双RESURF MOSFET的漂移电阻仅比单个RESURF MOSFET的漂移电阻低50%甚至更低。

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