机译:UTB SOI MOSFET中背栅对栅极感应的漏极泄漏和栅极电流的影响的建模
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Macquarie University, Sydney, N.S.W., Australia;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA;
Logic gates; MOSFET circuits; Tunneling; Leakage currents; Data models; MOSFET; Semiconductor device modeling;
机译:凹陷的源极/漏极UTB SOI MOSFET的前,后栅极电位分布和阈值电压的分析模型
机译:完全耗尽的双栅极MOSFET的栅极感应漏极漏电流模型
机译:热载流子应力对n沟道MOSFET中栅极感应的漏极泄漏电流的影响
机译:降低栅极感应漏电流的新型高架源漏MOSFET的分析
机译:独立双栅极SOI MOSFET晶体管泄漏电流的仿真分析。
机译:具有位置载流子散射相关性的准弹道漏电流电荷和电容模型对纳米级对称DG MOSFET有效
机译:完全耗尽的源极/漏极UTB SOI MOSFET亚阈值特性的建模和仿真,包括衬底引起的表面电势效应
机译:mOs器件中栅极引漏漏电流