Sensitivity Controllable CMOS Image Sensor Pixel Using Control Gate Overlaid on Photodiode

摘要

A new sensitivity controllable pixel structure is proposed for CMOS active-pixel image sensor. The proposed pixel structure has a sensitivity control gate overlaid on the photodiode. The sensitivity of the pixel is controlled by the bias voltage of the control gate that forms a variable accumulation-mode MOS capacitor. The prototype sensor is fabricated with a 0.35-$muhbox{m}$ CMOS process and consists of 60 $times$ 240 pixels with 5.6- $muhbox{m}$ pixel pitch. Measurement results show that the sensitivity of the photodiode can be controlled by a factor of 4.