Sub-30-nm FUSI CMOS Transistors Fabricated by Simple Method Without Additional CMP Process

摘要

We fabricated sub-30-nm fully silicide (FUSI) CMOS transistors by a simple method without additional chemical–mechanical-polish and gate-capping-layer processes. The FUSI draped with source/drain (S/D) capping layer (D-FUSI) featuring shallow S/D N