首页> 外文期刊>IEEE Electron Device Letters >A Novel SR Latch Device Realized by Integration of Three-Terminal Ballistic Junctions in InGaAs/InP
【24h】

A Novel SR Latch Device Realized by Integration of Three-Terminal Ballistic Junctions in InGaAs/InP

机译:通过在InGaAs / InP中集成三端弹道结实现的新型SR锁存器

获取原文
获取原文并翻译 | 示例

摘要

In this letter, a novel sequential logic device based on three-terminal ballistic junctions (TBJs) is proposed and demonstrated. Two TBJs and two in-plane gates are laterally integrated in a high-electron-mobility InGaAs/InP quantum-well material by a single-step lithography process. Electrical measurements reveal that the integrated device functions as a set–reset (SR) latch with voltage gains at room temperature. The demonstrated device provides a new and simple circuit design for SR latches in digital electronics.
机译:在这封信中,提出并演示了一种基于三端弹道结(TBJ)的新型顺序逻辑器件。通过单步光刻工艺,将两个TBJ和两个平面内栅极横向集成在高电子迁移率InGaAs / InP量子阱材料中。电气测量表明,该集成器件在室温下可作为置位复位(SR)锁存器,并具有电压增益。演示的器件为数字电子产品中的SR锁存器提供了一种新颖而简单的电路设计。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号