首页> 外文期刊>Electron Device Letters, IEEE >A Simple Test Structure for Directly Extracting Substrate Network Components in Deep n-Well RF-CMOS Modeling
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A Simple Test Structure for Directly Extracting Substrate Network Components in Deep n-Well RF-CMOS Modeling

机译:在深度n阱RF-CMOS建模中直接提取衬底网络组件的简单测试结构

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摘要

A simple test structure is proposed for accurately extracting the substrate network parameters of a radio-frequency MOSFET with deep n-well implantation from two-port measurements. The test structure with the source, drain, and gate terminals all connected together is used as port one, while the bulk terminal as port two, making the substrate network distinctly accessible in measurements. A methodology is developed to directly extract the parameters for the substrate network from the measured data. The method is further verified by the excellent match between the measured and simulated output admittances on the extracted parameters for a 16-finger nMOSFET of common-source configuration operated in different bias conditions.
机译:提出了一种简单的测试结构,用于从两端口测量中准确提取具有深n阱注入的射频MOSFET的衬底网络参数。源极,漏极和栅极端子都连接在一起的测试结构用作端口1,而体端子用作端口2,这使得在测量中可以清晰地访问衬底网络。开发了一种方法,可以从测量数据中直接提取基材网络的参数。对于在不同偏置条件下工作的共源配置的16指nMOSFET,在提取的参数上,实测和模拟输出导纳之间的出色匹配进一步验证了该方法。

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