...
首页> 外文期刊>Electron Device Letters, IEEE >Thin-Film ZnO Charge-Trapping Memory Cell Grown in a Single ALD Step
【24h】

Thin-Film ZnO Charge-Trapping Memory Cell Grown in a Single ALD Step

机译:在单个ALD步骤中生长的薄膜ZnO电荷陷阱存储单元

获取原文
获取原文并翻译 | 示例
           

摘要

A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first time. The extracted mobility and subthreshold slope of the thin-film device are 23 $hbox{cm}^{2}/hbox{V}cdot hbox{s}$ and 720 mV/dec, respectively. The memory effect is verified by a 2.35-V hysteresis in the $I_{rm drain}$– $V_{rm gate}$ curve. Physics-based TCAD simulations show very good agreement with the experimental results providing insight to the charge-trapping physics.
机译:展示了具有在单个原子层沉积步骤中沉积的栅堆叠的基于薄膜的ZnO基单晶体管存储单元。薄膜ZnO首次用作沟道材料和电荷俘获层。薄膜器件的提取的迁移率和亚阈值斜率分别为23 $ hbox {cm} ^ {2} / hbox {V} cdot hbox {s} $和720 mV / dec。通过$ I_ {rm漏极} $ – $ V_ {rm栅极} $曲线中的2.35-V磁滞来验证存储效应。基于物理的TCAD仿真显示与实验结果非常吻合,从而为电荷陷阱物理提供了见识。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号