Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture

Zhu Haozhe; Wang Yu; Shi C. -J. Richard

首页> 外文期刊>Design & Test of Computers, IEEE >Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture

【24h】

Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture

机译：Tanji：具有统一横杆架构的通用神经网络加速器

获取原文

获取原文并翻译 | 示例

开具论文收录证明 >>

页面导航

摘要
著录项
引文网络
相似文献
相关主题

摘要

Editor's note: TK

机译：编辑注意事项：TK

著录项

来源
《Design & Test of Computers, IEEE》 |2020年第1期|56-63|共8页
作者
Zhu Haozhe; Wang Yu; Shi C. -J. Richard;
展开▼
作者单位

Fudan Univ Shanghai Peoples R China;

Fudan Univ Shanghai Peoples R China;

Fudan Univ Shanghai Peoples R China|Univ Washington Elect & Comp Engn Seattle WA 98195 USA;

展开▼
收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
原文格式 PDF
正文语种 eng
中图分类
关键词
Computer architecture; Neural networks; Convolution; Kernel; System-on-chip; Bandwidth; Unicast; Neural network accelerator; multi-type neural network; deep learning; crossbar architecture;

机译：计算机架构;神经网络;卷积;内核;片上系统;带宽;单播;神经网络加速器;多型神经网络;深度学习;横杆建筑;

相似文献

外文文献
中文文献
专利

1. Neural network accelerator design with resistive crossbars: Opportunities and challenges [J] . Jain S., Ankit A., Chakraborty I, IBM Journal of Research and Development . 2019,第6期

机译：具有电阻式交叉开关的神经网络加速器设计：机遇与挑战
2. ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars [J] . Ali Shafiee, Anirban Nag, Naveen Muralimanohar, Computer architecture news . 2016,第3期

机译：ISAAC：在交叉开关中具有原位模拟算法的卷积神经网络加速器
3. STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator [J] . Lili Song, Ying Wang, Yinhe Han, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2017,第4期

机译：精确可调通用神经网络加速器的STT-RAM缓冲区设计
4. ReNEW: Enhancing Lifetime for ReRAM Crossbar Based Neural Network Accelerators [C] . Wen Wen, Youtao Zhang, Jun Yang International conference on computer design . 2019

机译：更新：延长基于ReRAM Crossbar的神经网络加速器的使用寿命
5. Ferroelectric Memory and Architecture for Deep Neural Network Training in Resistive Crossbar Arrays [D] . Alessandri , Cristobal. 2019

机译：电阻横杆阵列深神经网络训练的铁电记忆与架构
6. Memristor-CMOS Hybrid Neuron Circuit with Nonideal-Effect Correction Related to Parasitic Resistance for Binary-Memristor-Crossbar Neural Networks [O] . Tien Van Nguyen, Jiyong An, Kyeong-Sik Min 2021

机译：具有与二进制 - 忆阻 - 横杆神经网络的寄生电阻相关的非外膜效应校正的映像器-CMOS混合神经元电路
7. MARS: Multi-macro Architecture SRAM CIM-Based Accelerator with Co-designed Compressed Neural Networks [O] . Syuan-Hao Sie, Jye-Luen Lee, Yi-Ren Chen, 2021

机译：MARS：基于多宏架构SRAM CIM的加速器，具有共同设计的压缩神经网络

Tanji: a General-purpose Neural Network Accelerator with Unified Crossbar Architecture

摘要

著录项

引文网络

相似文献

相关主题

期刊订阅