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A simple mechanism for detecting ineffectual instructions in slipstream processors

机译:用于检测滑流处理器中无效指令的简单机制

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A slipstream processor accelerates a program by speculatively removing repeatedly ineffectual instructions. Detecting the roots of ineffectual computation: unreferenced writes, nonmodifying writes, and correctly predicted branches, is straightforward. On the other hand, detecting ineffectual instructions in the backward slices of these root instructions currently requires complex back-propagation circuitry. We observe that, by logically monitoring the speculative program (instead of the original program), back-propagation can be reduced to detecting unreferenced writes. That is, once root instructions are actually removed, instructions at the next higher level in the backward slice become newly exposed unreferenced writes in the speculative program. This new algorithm, called implicit back-propagation, eliminates complex hardware and achieves an average performance improvement of 11.8 percent, only marginally lower than the 12.3 percent improvement achieved with explicit back-propagation. We further simplify the hardware component by electing not to detect ineffectual memory writes, focusing only on ineffectual register writes. A minimal implementation consisting of only a register-indexed table (similar to an architectural register file) achieves a good balance between complexity and performance (11.2 percent average performance improvement with implicit back-propagation and without detection of ineffectual memory writes).
机译:滑流处理器通过推测性地删除重复的无效指令来加速程序。检测无效计算的根源是很简单的:未引用的写入,未修改的写入以及正确预测的分支。另一方面,检测这些根指令的后向切片中的无效指令当前需要复杂的反向传播电路。我们观察到,通过逻辑上监视推测性程序(而不是原始程序),可以将反向传播减少为检测未引用的写入。也就是说,一旦根指令被实际删除,后向切片中更高一级的指令将成为推测程序中新公开的未引用写操作。这种称为隐式反向传播的新算法消除了复杂的硬件,平均性能提高了11.8%,仅略低于显式反向传播实现的12.3%的提高。我们通过选择不检测无效的内存写入来进一步简化硬件组件,仅关注无效的寄存器写入。仅由寄存器索引表(类似于体系结构寄存器文件)组成的最小实现可实现复杂性和性能之间的良好平衡(在隐式向后传播且未检测到无效内存写入的情况下,平均性能提高了11.2%)。

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