Damage Evaluation of Wet-Chemical Si-Wafer Thinning/Backside Via Exposure Process

摘要

To realize low-cost and damage-less through silicon via (TSV) formation, we evaluated the damage caused by a new wet-chemical Si-wafer thinning/backside via exposure process. Damage at the etched Si subsurface was examined using ball-on-ring tests, cross-sectional transmission electron microscopy, and electron energy loss spectroscopy. The die fracture load obtained after this process was higher than those for processes that include a backgrinding step. There was little damage to the etched Si subsurface layer after our new process. We then evaluated the damage in 0.8-$mu{rm m}$ metal-oxide-semiconductor field-effect transistor generated by the new process. The changes in threshold voltage, subthreshold swing, transconductance, and leakage current were very small, even when the wafer was thinned down to 20 $mu{rm m}$. Finally, we applied our new process to a Cu/Ta via wafer to evaluate the damage in a TSV. No damaged layers were observed in the TSV, and the leakage current between the TSVs after this process was sufficiently small for practical application.