Individual flip-flops with gated clocks for low power datapaths

摘要

Energy consumption has become one of the important factors inndigital systems, because of the requirement to dissipate this energy innhigh-density circuits and to extend the battery life in portable systemsnsuch as devices with wireless communication capabilities. Flip-flops arenone of the most energy-consuming components of digital circuits. Thisnpaper presents techniques to reduce energy consumption by individuallyndeactivating the clock when flip-flops do not have to change theirnvalue. Flip-flop structures are proposed and selection criteria given tonobtain minimum energy consumption. The structures have been evaluatednusing energy models and validated by switch-level simulations. For thenapplications considered, significant energy reductions arenachieved