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The architecture of delta sigma analog-to-digital converters usinga voltage-controlled oscillator as a multibit quantizer

机译:使用压控振荡器作为多位量化器的delta sigma模数转换器的体系结构

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This brief proposes a new- architecture for the oversamplingndelta-sigma analog-to-digital converter (ADC) utilizing a voltagencontrolled oscillator (VCO). The VCO, associated with a pulse counter,nworks as a high-speed quantizer. This VCO quantizer also has thenfunction of first-order noise shaping because the phase of the outputnpulse is an integrated quantity of the input voltage. If the maximum VCOnfrequency (fvm) is designed in the range ofn(2bq-2)fos
机译:本简介为采用压控振荡器(VCO)的过采样Δ-Σ模数转换器(ADC)提出了一种新架构。与脉冲计数器关联的VCO充当高速量化器。由于输出脉冲的相位是输入电压的积分量,因此该VCO量化器还具有一阶噪声整形的功能。如果将最大VCOnfrequency(fvm)设计在n(2bq-2)fos

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