In this paper, we propose a cost-effective test generationntechnique for linear time-invariant analog circuits subject to thenparametric faults. This technique requires only a small number of testnpatterns, as opposed to traditional functional testing which utilizesncomplex stimuli, to classify the circuits. We formulate thentest-generation problem as a problem of deriving hyperplanes in thenmultidimensional space formed by a set of parameters of the device underntest (DUT). These hyperplanes define the acceptance region in thenmeasurement space and can be derived by a search-based heuristic. Thencoefficients of the hyperplanes are then used as test patterns fornclassification (to determine whether the DUT is in the acceptance regionnor not). A more general case of using arbitrary “linearlynindependent” test sequence for classification is also discussed.nExperimental results show that less than 10% of misclassification can benachieved by a very small number of tests
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