Low-complexity bit-parallel systolic architecture for computing AB2+C in a class of finite field GF(2m)

摘要

An algorithm for computing AB2+C over a finite fieldnGF(2m) is presented using the properties of the irreduciblenall one polynomial of degree m. Based on the algorithm, a parallel-innparallel-out systolic multiplier is proposed. The architecture of thenmultiplier is very simple, regular, modular, and exhibits very lownlatency and propagation delay. Therefore, it is suitable for very largenscale integration implementation of cryptosystems