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An External Capacitor-Less Low-Dropout Voltage Regulator Using a Transconductance Amplifier

机译:使用跨导放大器的无需外部电容器的低压降稳压器

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This brief presents an external capacitor-less nMOS low-dropout (LDO) voltage regulator integrated with a standard CSMC 0.6-mu m BiCMOS technology. Over a -55 degrees C to +125 degrees C temperature range, the fabricated LDO provides a stable and considerable amount of 3 A output current over wide ranges of output capacitance C-OUT (from zero to hundreds of mu F) and effective-series-resistance (ESR) (from tens of milliohms to several ohms). A LDO voltage of 200 mV has been realized by accurate modeling. Operating with an input voltage ranging from 2.2 to 5.5 V provides a scalable output voltage from 0.8 to 3.6 V. When the load current jumps from 100 mA to 3 A within 3 mu s, the output voltage overshoot remains as low as 50 mV without output capacitance, C-OUT. The system bandwidth is about 2 MHz, and hardly changes with load altering to ensure system stability. To improve the load transient response and driving capacity of the nMOS power transistor, a buffer with high input impedance and low output impedance is applied between the transconductance amplifier and the nMOS power transistor. The total area of fabricated LDO voltage regulator chip including pads is 2.1 mm x 2.2 mm.
机译:本简介介绍了一个集成了标准CSMC 0.6微米BiCMOS技术的外部无电容器nMOS低压降(LDO)稳压器。在-55摄氏度至+125摄氏度的温度范围内,制造的LDO可在宽范围的输出电容C-OUT(从零到数百μF)和有效系列时提供稳定且可观的3 A输出电流。 -电阻(ESR)(从几十毫欧到几欧姆)。通过精确建模已经实现了200 mV的LDO电压。输入电压范围为2.2至5.5 V,可提供0.8至3.6 V的可扩展输出电压。当负载电流在3 ms内从100 mA跃升至3 A时,无输出时输出电压过冲仍可低至50 mV电容,C-OUT。系统带宽约为2 MHz,并且几乎不会随负载变化而变化,以确保系统稳定性。为了改善nMOS功率晶体管的负载瞬态响应和驱动能力,在跨导放大器和nMOS功率晶体管之间采用了具有高输入阻抗和低输出阻抗的缓冲器。包括焊盘的LDO稳压器芯片的总面积为2.1 mm x 2.2 mm。

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