Low-Dropout Voltage Source: An Alternative Approach for Low-Dropout Voltage Regulators

摘要

In this brief, a high-order temperature-compensated 0.6-V low-dropout voltage source (LDVS) is realized in standard 0.13- $muhbox{m}$ CMOS technology. The LDVS operates at supply voltages down to 0.75 V and consumes only 39 $muhbox{A}$ while providing up to 100 mA of load current. Gate-to-channel capacitance values of MOSFETs are employed to implement the capacitors, reducing chip area and enabling integration in any inexpensive CMOS technology. The regulation loop is compensated using a combined pole-splitting and feedforward technique, which results in stable operation from a no-load current to 100 mA of full-load current. A temperature-dependent current-driven voltage generator is proposed to suppress the line-voltage sensitivity of the LDVS. To further improve line regulation, a line-voltage compensation circuit is introduced, which lowers the line sensitivity by about three times down to 0.54%/V. With a supply voltage of 1 V and no output filtering capacitor, the mean power-supply rejection is $-$51 and $-$24 dB for 1 and 10 MHz, respectively. The proposed LDVS requires no startup circuit. The 0.1% startup settling time is 73 $muhbox{s}$ with a supply voltage of 0.8 V and a load current of 1 mA. In the temperature range of $-25 ^{circ}hbox{C}$– $,+85 ^{circ}hbox{C}$, it demonstrates a maximum temperature drift of only 32 $hbox{ppm}/^{circ}hbox{C}$.