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A 50-mA 1-nF Low-Voltage Low-Dropout Voltage Regulator for SoC Applications

机译:适用于SoC应用的50mA 1nF低压降低压降稳压器

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摘要

In this paper, we present a low-voltage low-dropout voltage regulator (LDO) for a system-on-chip (SoC) application which, exploiting the multiplication of the Miller effect through the use of a current amplifier, is frequency compensated up to 1-nF capacitive load. The topology and the strategy adopted to design the LDO and the related compensation frequency network are described in detail. The LDO works with a supply voltage as low as 1.2 V and provides a maximum load current of 50 raA with a drop-out voltage of 200 mV: the total integrated compensation capacitance is about 40 pF. Measurement results as well as comparison with other SoC LDOs demonstrate the advantage of the proposed topology.
机译:在本文中,我们介绍了一种用于片上系统(SoC)应用的低压低压差稳压器(LDO),该稳压器通过使用电流放大器来利用米勒效应的乘法运算,从而对频率进行了补偿。至1nF的电容负载。详细介绍了设计LDO和相关补偿频率网络所采用的拓扑和策略。 LDO的电源电压低至1.2 V,并提供50 raA的最大负载电流和200 mV的压降:总集成补偿电容约为40 pF。测量结果以及与其他SoC LDO的比较证明了所建议拓扑的优势。

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