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首页> 外文期刊>IEEE Transactions on Applied Superconductivity >Design and fabrication of an adder circuit in the extended phase-mode logic
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Design and fabrication of an adder circuit in the extended phase-mode logic

机译:扩展相模逻辑中加法器电路的设计与制造

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We present the design and the fabrication of an adder circuit in the extended phase-mode logic family. The phase-mode logic is a single flux quantum (SFQ) logic which utilizes an SFQ as an information bit carrier. The single-bit adder circuit is made up of an INHIBIT gate which is the basic device of the phase-mode logic. The circuit has been designed and fabricated using Nb/AlO/sub x//Nb Josephson junctions with Josephson critical current density of 1.0 kA/cm/sup 2/. In order to confirm the circuit operation, the fabricated adder circuit has been tested at low speed. For investigating the possibility of a high-frequency operation, dc voltages generated by fluxon pulse trains have been measured. From the Josephson voltage-frequency relation, the result shows that the circuit has potential to complete the carry operation within 20 psec.
机译:我们介绍了扩展相模式逻辑系列中加法器电路的设计和制造。相位模式逻辑是利用SFQ作为信息位载波的单通量量子(SFQ)逻辑。一位加法器电路由INHIBIT门组成,INHIBIT门是相模逻辑的基本器件。该电路是使用Nb / AlO / sub x // Nb Josephson结设计和制造的,其Josephson临界电流密度为1.0 kA / cm / sup 2 /。为了确认电路工作,已对加法器电路进行了低速测试。为了研究高频操作的可能性,已经测量了由磁通脉冲串产生的直流电压。从约瑟夫森电压-频率关系,结果表明该电路有潜力在20 ps之内完成进位操作。

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