Integration of graphene oxide buffer layer/graphene floating gate for wide memory window in Pt/Ti/AI_2O_3/GO/graphene/SiO_2/p-Si/Au non-volatile (FLASH) applications

摘要

The excellent electronic properties of graphene such as high density of states, work-function, and low dimensionality promote the usage of graphene as an efficient floating gate (FG) layer for downscaled, high density non-volatile flash memories (NVFMs). However, the chemical inertness of graphene requires a buffer layer for the uniform deposition of a high-k blocking layer (high-k blocking oxide/buffer layer/graphene/SiO2/p-Si/Au). Herein, FG-NVFM devices are fabricated using few-layer graphene as a FG followed by deposition of spin-coated monolayer graphene oxide (GO) as a buffer layer. The simple, stress free deposition of GO decorated with the functional groups is anticipated for the uniform deposition of blocking oxide (Aluminum oxide, Al2O3) over GO/graphene/SiO2/p-Si/Au. Beyond this, it improves the interface (Al2O3/GO/graphene), leading to enhanced memory characteristics for the fabricated Pt/Ti/Al2O3/GO/graphene/SiO2/p-Si/Au FG-NVFM structure. The electrical characterizations of the fabricated FG-NVFM devices show a significantly wide memory window of similar to 4.3 V @ 67 V at 1MHz and robust retention up to similar to 2 x 10(13)s (15 years). These observations clearly reveal an efficient potential of graphene for FG and GO as a buffer layer for the future NVFM device applications. Published by AIP Publishing.