2～5GHz 0.18μm CMOS宽带低噪声放大器设计

摘要

本文设计实现了一个2～5GHz的两级CMOS低噪声放大器(LNA),可应用在超宽带的下半频段(3.1～5GHz).LNA由两级组成,第一级是一个共栅级,保持良好的线性度并完成较好的输入匹配;第二级是一个共源级堆叠一个电流源,在保持低噪声系数的同时降低功耗.通过级联共栅和共源结构进行增益补偿,所设计的LNA具有近似恒定的增益和噪声系数.采用0.18μm CMOS工艺实现后,模拟结果表明,增益和噪声系数在2～5GHz频率范围内分别为11.5dB和5.1dB,输入反射系数低于-22dB.在4GHz时,模拟得到的三阶交调点为-10dBm.在1.8V电源电压下,LNA的功耗约为11mW.%A two-stage 2-5GHz CMOS Low Noise Amplifier(LNA) for the lower side of Ultra-Wide-Band (UWB) applications(3.1-5GHz) is presented.This LNA consists of two stages.The first stage is a commongate structure maintaining good linearity with better input matching; the second stage is a common-source stage stacked with a current mirror, which obtains low Noise Figure(NF) and reduces the LNA's power consump tion.By introducing common-gate and common-source stages to compensate gain mutually, the proposed LNA has achieved nearly flat power gain and NF.This LNA has been implemented by a 0.18μm CMOS process.The successive simulation results indicate that the power gain(S21) keeps 11.5dB over the wide frequency band of 2-5GHz with NF 5.1dB and input return loss(S11) below -22dB in the entire band.The simulated input-referred third-order intercept point(ⅡP3) at 4GHz is -10dBm.The LNA consumes about 11mW under the 1.8V supply.