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Doherty architecture for wideband power amplifier design
Doherty architecture for wideband power amplifier design
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机译:宽带功率放大器设计的Doherty架构
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摘要
Embodiments of a Doherty amplifier device are provided, where the device includes a main amplifier that produces a first RF signal with a variable first output power and a peaking amplifier that produces a second RF signal with a variable second output power equivalent to the first output power multiplied by a power ratio n greater than one; first and second RF signals combined in phase at a combining node; and a main output matching network (OMN), wherein the main OMN forms a portion of an equivalent main path transmission line having a characteristic impedance equivalent to (n+1)·√{square root over (Ropt·R0)}, wherein Ropt is a load impedance seen at the main amplifier intrinsic current generator plane during a full power condition of the Doherty amplifier device and (n+1)·R0 is a load impedance seen at the combining node during a back-off power condition of the Doherty amplifier device.
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