首页> 外文会议>Wide bandgap semiconductor materials and devices 15 >Fabrication and Performance of InAlN/GaN-on-Si MOSHEMTs with LaAlO_3 Gate Dielectric using Gate-First CMOS Compatible Process at Low Thermal Budget
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Fabrication and Performance of InAlN/GaN-on-Si MOSHEMTs with LaAlO_3 Gate Dielectric using Gate-First CMOS Compatible Process at Low Thermal Budget

机译:采用LaAlO_3栅介电层的InAlN / GaN-on-Si MOSHEMT的制备和性能,采用低热预算的栅极优先CMOS兼容工艺

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摘要

A gate-first CMOS compatible process at low thermal budget to fabricate InAlN/GaN-on-Si MOSHEMTs is reported. This is made possible by a good quality LaAlO_3 gate dielectric (k ~ 21.8) and Hf/Al/Ta ohmic contacts that require low annealing temperature. The reverse leakage current of the W/LaAlO_3 gate stack remains low (< 3×10~(-7) mA/mm at -10 V) upon ohmic contact annealing at 600 ℃. The fabricated LaAlO_3 gate dielectric MOSHEMTs demonstrate a reasonable DC performance (I_(dsat) ~510 mA/mm, G_(max) ~ 44 mS/mm) for a 1 μm gate length device.
机译:据报道,在低热预算的情况下,栅极优先的CMOS兼容工艺可以制造InAlN / Si上的GaN MOSHEMT。高质量的LaAlO_3栅极电介质(k〜21.8)和需要低退火温度的Hf / Al / Ta欧姆接触成为可能。在600℃进行欧姆接触退火后,W / LaAlO_3栅叠层的反向漏电流保持低(在-10 V时<3×10〜(-7)mA / mm)。对于1μm栅长的器件,所制造的LaAlO_3栅极电介质MOSHEMT表现出合理的DC性能(I_(dsat)〜510 mA / mm,G_(max)〜44 mS / mm)。

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    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

    Department of Electrical and Computer Engineering, National University of Singapore, Singapore 119074;

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