首页> 外文会议>VLSI Circuits and Systems III; Proceedings of SPIE-The International Society for Optical Engineering; vol.6590 >Ultra Low Power Switched Current Finite Impulse Response Filter Banks Realized in CMOS 0.18 μm technology
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Ultra Low Power Switched Current Finite Impulse Response Filter Banks Realized in CMOS 0.18 μm technology

机译:采用CMOS 0.18μm技术实现的超低功耗开关电流有限冲激响应滤波器组

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Ultra low power circuits are in high demand in many applications especially in wireless sensor networks (WSN), where energy is scavenged from environment. WSN systems contain different blocks, such as: sensors, filters, analog-to-digital converters, very often a simple processor and the RF front end block. This paper concerns ultra low power finite impulse response (FIR) filters and filter banks implemented in a switched current (SI) technique. In this paper new SI FIR filter structures and filter banks have been proposed. These circuits operate in the current mode and do not use operational amplifiers, what enables very low power dissipation on the level of several μW. Proposed filters incorporate transistors working under threshold level for the voltage supply that is in the range 0.5 - 0.7 V. The simulated attenuation in the stopband of the frequency response is limited to about 45 dB, what is due to different nonidealities, but such value is usually sufficient in WSN applications. The SI technique features many interesting mechanisms that simplify realization of analog filter banks. The signal samples that are stored in the delay lane are in SI filters copied to the filter coefficients using current mirrors. As a result, there exists the possibility to connect many sets of filter coefficients to a single delay line without the speed limitation. Ultra low power operation of proposed filters is also possible due to a special structure of the clock generator that only consists from switches and NOT gates.
机译:在许多应用中,特别是在从环境中清除能量的无线传感器网络(WSN)中,对超低功耗电路的需求很高。 WSN系统包含不同的模块,例如:传感器,滤波器,模数转换器,通常是简单的处理器和RF前端模块。本文涉及以开关电流(SI)技术实现的超低功率有限脉冲响应(FIR)滤波器和滤波器组。本文提出了新的SI FIR滤波器结构和滤波器组。这些电路在电流模式下工作,不使用运算放大器,这可以在几μW的水平上实现极低的功耗。建议的滤波器包含晶体管,这些晶体管在阈值电平下工作,电压范围为0.5-0.7V。由于不同的非理想性,频率响应的阻带中的模拟衰减限制为大约45 dB,但这是通常在WSN应用中就足够了。 SI技术具有许多有趣的机制,可简化模拟滤波器组的实现。延迟通道中存储的信号样本位于使用电流镜复制到滤波器系数的SI滤波器中。结果,存在将多组滤波器系数连接到单个延迟线上而没有速度限制的可能性。由于仅由开关和非门组成的时钟发生器的特殊结构,建议的滤波器也可以超低功耗运行。

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