首页> 外文会议>Conference on VLSI Circuits and Systems >Ultra low power switched current finite impulse response filter banks realized in CMOS 0.18 mgr;m technology
【24h】

Ultra low power switched current finite impulse response filter banks realized in CMOS 0.18 mgr;m technology

机译:超低功率开关电流有限脉冲响应滤波器组在CMOS 0.18和MGR中实现

获取原文

摘要

Ultra low power circuits are in high demand in many applications especially in wireless sensor networks (WSN), where energy is scavenged from environment. WSN systems contain different blocks, such as: sensors, filters, analog-to-digital converters, very often a simple processor and the RF front end block. This paper concerns ultra low power finite impulse response (FIR) filters and filter banks implemented in a switched current (SI) technique. In this paper new SI FIR filter structures and filter banks have been proposed. These circuits operate in the current mode and do not use operational amplifiers, what enables very low power dissipation on the level of several μW. Proposed filters incorporate transistors working under threshold level for the voltage supply that is in the range 0.5 - 0.7 V. The simulated attenuation in the stopband of the frequency response is limited to about 45 dB, what is due to different nonidealities, but such value is usually sufficient in WSN applications. The SI technique features many interesting mechanisms that simplify realization of analog filter banks. The signal samples that are stored in the delay lane are in SI filters copied to the filter coefficients using current mirrors. As a result, there exists the possibility to connect many sets of filter coefficients to a single delay line without the speed limitation. Ultra low power operation of proposed filters is also possible due to a special structure of the clock generator that only consists from switches and NOT gates.
机译:在许多应用中,超低功率电路的需求量很高,特别是在无线传感器网络(WSN)中,能量从环境中清除。 WSN系统包含不同的块,例如:传感器,滤波器,模数转换器,通常是简单的处理器和RF前端块。本文涉及以开关电流(SI)技术实现的超低功率有限脉冲响应(FIR)滤波器和滤波器组。在本文中,已经提出了新的SI FIR滤波器结构和滤波器。这些电路在当前模式下运行,不使用运算放大器,可以在几个μW的水平上实现非常低的功耗。提出的滤光器包括在0.5-0.7V范围内的电压电源下工作的晶体管。频率响应的阻带中的模拟衰减限制为约45dB,因此由于不同的非侵害是由于不同的非侵害,但此类值是通常在WSN应用程序中足够。 SI技术具有许多有趣的机制,可简化模拟滤波器组的实现。存储在延迟通道中的信号样本是使用电流镜复制到滤波器系数的SI滤波器。结果,在没有速度限制的情况下,存在将许多滤波器系数连接到单个延迟线。由于时钟发生器的特殊结构,所提出的滤波器的超低功率操作也是可能的,只能由开关而不是门。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号