A new SiGe Stepped Gate (SSG) thin film SOI LDMOS for enhanced breakdown voltage and reduced delay

摘要

This paper introduces a new SiGe Stepped Gate (SSG) thin film SOI LDMOS for enhanced performance. The proposed device eliminates the premature breakdown of the device due to floating body effects, which is one major problem of the thin film SOI LDMOS. The most common technique used to eliminate the floating body effects in SOI power device is the source tied body contact. Though this technique is successful in thick film devices, its effectiveness to thin film LDMOS is questionable, and also it imposes area penalty. Without a body contact, the floating body effects can be also reduced by decreasing the drift region doping [1]. But increased drift region resistance degrades the on-resistance of the device. The proposed device, SSG LDMOS circumvents the above challenges. It has a germanium implanted source and stepped field plate in the drift region. The SSG LDMOS reduces floating body effects in two ways. The SiGe source offers low potential to the excess holes generated due to the impact ionization [2]. The stepped gate reduces gate-drain capacitance improving the switching speed. The combined effect of (i) SiGe in the source and (ii) the stepped gate, improves the breakdown voltage and also allows us to increase the drift doping levels resulting in a reduced on-resistance.