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Simulation of resist heating effect with E-beam lithography using Distributed Processing (DP)

机译:使用分布式处理(DP)的电子束光刻模拟抗蚀剂加热效果

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As the design rule with wafer is tightening to sub-100nm, the specification of Mask CD uniformity is steeply tightened too. For instance, according to 2004 ITRS Roadmap updated, the specification of DRAM's CD uniformity requires less then 7nm on 80nm nodes in Yr. 2005. In order to satisfy that specification, it is important to analyze various factors such as e-beam machine error, heating effect, fogging effect, proximity effect, and process errors which cause CD non-uniformity in the mask. In this paper, a simulation method will be introduced to calculate the local and global heating effect by applying DP(Distributed Processing). First, experiments were performed to see heating effects on mask CD uniformity. In case of the ZEP process with 50KeV exposure, the CD error caused by heating effect amounted to 45nm in worst case. Second, heating effect was simulated using DP. Recently, most simulators have been required high accuracy. However, it is inevitable to spend more calculation time. To improve that problem, DP has been adopted in many softwares. In this paper, MPI(Message Passing Interface) library was applied to simulate heating effect. Finally, the experiment and simulated results were compared. As a result, simulation results could explain the CD errors investigated on our experiment. In our experiment, 2D simulation is sufficient to expect CD errors caused by resist heating effect.
机译:随着晶圆的设计规则被拉紧至100nm以下,Mask CD均匀性的规范也被严格拉紧。例如,根据2004年更新的ITRS路线图,DRAM的CD均匀性规范要求Yr中的80nm节点上的7nm以下。 2005年。为了满足该规范,重要的是分析各种因素,例如电子束机器误差,加热效果,起雾效果,接近效果以及导致掩模中CD不一致的工艺误差。在本文中,将介绍一种模拟方法,通过应用DP(分布式处理)来计算局部和全局热效应。首先,进行实验以观察加热对掩模CD均匀性的影响。在采用50KeV曝光的ZEP工艺的情况下,在最坏的情况下,由热效应引起的CD误差总计为45nm。其次,使用DP模拟热效应。最近,大多数模拟器都需要高精度。但是,不可避免的是要花费更多的计算时间。为了改善该问题,DP已被许多软件采用。本文利用MPI(消息传递接口)库来模拟加热效果。最后,比较了实验结果和仿真结果。结果,模拟结果可以解释我们实验中调查的CD错误。在我们的实验中,二维模拟足以预期由抗蚀剂加热效应引起的CD误差。

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