首页> 外文会议>NSTI Nanotechnology Conference and Trade Show(NSTI Nanotech 2005) vol.3; 20050508-12; Anaheim,CA(US) >Fabrication and characterization of MOS transistor tip integrated micro cantilever
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Fabrication and characterization of MOS transistor tip integrated micro cantilever

机译:MOS晶体管尖端集成微悬臂梁的制作与表征

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摘要

We fabricate and characterize the metal-oxide-semiconductor (MOS) transistor tip integrated micro cantilever, which is proposed for a future high-density data storage system. The integrated MOS transistor tip as the sensing part has some advantages; it detects the electric signal with the fast speed compared with the previous SPM probes, and it can reduce the required equipments such as the lock-in-amplifier. The MOS transistor tip is fabricated 3-dimensionally, utilizing the lateral diffusion and the anisotropic wet etching with TMAH solution, since the etch rate of {211} plane is much higher than those of {100} or {111} planes. The gate area is formed by self-aligned technique, using crystallographic dependant wet etching. The well-known convex corner compensation pattern is used for the gate length control during the tip fabrication process. The characteristics of the fabricated device are measured and the results show the well-established detection properties.
机译:我们制造并表征了集成有金属氧化物半导体(MOS)晶体管尖端的微悬臂梁,该悬臂梁是为未来的高密度数据存储系统提出的。集成的MOS晶体管尖端作为感应部分具有一些优势;与以前的SPM探头相比,它可以更快地检测电信号,并且可以减少所需的设备,例如锁相放大器。由于{211}平面的蚀刻速率比{100}或{111}平面的蚀刻速率高得多,因此利用横向扩散和TMAH溶液进行各向异性湿法蚀刻可在3维上制造MOS晶体管尖端。通过使用晶体学相关的湿法刻蚀,通过自对准技术形成栅极区域。众所周知的凸角补偿图案用于尖端制造过程中的栅极长度控制。测量了所制造设备的特性,结果显示了已确立的检测特性。

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