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Fabrication and characterization of 3-Dimensional MOS transistor tip integrated micro cantilever

机译:三维MOS晶体管尖端集成微悬臂梁的制作与表征

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摘要

We fabricate and characterize a three-dimensional (3-D) MOS (metal-oxide-semiconductor) transistor tip integrated micro cantilever to measure the surface properties. The 3-D MOS transistor tip is fabricated on the front side end of the cantilever, and the cantilever itself works as a tip. These features make the device possible to investigate hard-detecting parts such as the deep trenches and the sidewalls of the structure. The MOS transistor tip has other advantages such as the high operation speed, the high sensitivity, and the reduction of the required equipments like the lock-in-amplifier. The MOS transistor tip is fabricated three-dimensionally, utilizing the lateral diffusion and the anisotropic wet etching with TMAH solution, since the etch rate of {211} plane is much higher than those of {100} or {111} planes. The gate area is formed by self-aligned technique, using crystallographic dependant wet etching. The well-known convex corner compensation pattern is used for the gate length control during the tip fabrication process. The characteristics of the fabricated device are measured with respect to the various electric signals and the results show the well-established detection properties.
机译:我们制造并表征集成了微悬臂的三维(3-D)MOS(金属氧化物半导体)晶体管尖端,以测量表面性能。 3-D MOS晶体管尖端是在悬臂的前端制造的,悬臂本身就是尖端。这些特征使该设备能够研究难以检测的部分,例如深沟槽和结构的侧壁。 MOS晶体管的尖端具有其他优势,例如高运算速度,高灵敏度以及所需设备(如锁相放大器)的减少。由于{211}平面的蚀刻速率比{100}或{111}平面的蚀刻速率高得多,因此利用横向扩散和TMAH溶液进行各向异性湿法蚀刻可在3维上制造MOS晶体管尖端。通过使用晶体学相关的湿法刻蚀,通过自对准技术形成栅极区域。众所周知的凸角补偿图案用于尖端制造过程中的栅极长度控制。相对于各种电信号测量所制造的设备的特性,结果表明了已确立的检测特性。

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