Ultimate Backside Sample Preparation For Ultra Thin High-k/Metal Gate Stack Characterization

摘要

Backside sample preparation is a well known method to help circumvent undesired effects and artifacts in the analysis of a sample or device structure. However it remains challenging in the case of thin layers analysis since only a fraction of the original sample must remain while removing all of the substrate and maintaining a smooth and flat surface suitable for analysis. Here we present a method adapted to the preparation of ultra thin layers grown on pure Si substrates. It consists in a mechanical polishing up to a few remaining microns, followed by a dedicated wet etch. This method can be operated in a routine fashion and yields an extremely flat and smooth surface, without any remaining Si from substrate. It therefore allows precise analysis of the layers of interests with various characterization techniques.