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Metrology for Characterization of Wafer Thickness Uniformity During 3D-IC Processing: SEMATECH Workshop on 3D Interconnect Metrology - (PPT)

机译:3D-IC处理期间晶片厚度均匀性表征的计量:3D互连计量的Sematech车间 - (PPT)

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Utilizes mount that has 2-3 orders of magnitude lower gravity deflection - Leverages technology for ultra-precise photo mask characterization - Avoids gravity sag vs. accounting for it - eliminates the need for significant assumptions. Data shows significantly better measurement repeatability using wire support over 3-point mount. Correlation of wafer TTV and stack TTV demonstrates MSP value. Actual data points every <1 mm gives high fidelity data with little/no prior assumptions on the part shape - Data density invaluable to characterize Si wafers and carrier wafers - You must be able to see the error to achieve required performance - Substantial opportunity to use data for process enhancements (IC manufacture (silicon wafer flatness), glass wafer flatness/TTV, carrier wafer recycling).
机译:利用具有2-3个级别的重力偏转的安装架 - 利用用于超精确的照片掩模表征的技术 - 避免重力SAG与IT的核算 - 消除了对显着假设的需求。数据显示使用线路支架在3点安装上显示出明显更好的测量可重复性。晶片TTV和堆栈TTV的相关性演示了MSP值。每个<1 mm的实际数据点给出高保真数据,零件形状的零件形状 - 数据密度非常宝贵的假设,以表征Si晶圆和载体晶片 - 您必须能够看到误差以实现所需的性能 - 大量使用机会用于过程增强的数据(IC制造(硅晶片平整度),玻璃晶片平整度/ TTV,载体晶片回收)。

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