Methods and designs for improving the signal integrity for 3D electrical interconnects in high performance IC packaging

摘要

Design of high performance package interconnects using full-wave electromagnetic solvers is necessary due to increased operation speed, miniaturization and vertical 3D integration. Thus the segmented study and optimization is becoming inevitable for designers to improve the signal integrity of IC packaging. This paper addresses alternative methods and optimal designs on several components and structures for package electrical interconnect, including voiding technique, padless via implementation, spiral micro-via stacking and signal/ground layout patterns. The simulated time domain results have been presented to demonstrate the improvements of optimized schemes. These methodologies could be treated as handy references and general guidelines applied to differential package line resulting in a significant improvement of overall package signal integrity performance.