首页> 外文会议>Symposium on Extending Moore's Law with Advanced Channel Materials >Sub-30 nm FinFETs with Schottky-Barrier Source/Drain Featuring Complementary Metal Silicides and Fully-Silicided Gate for P-FinFETs
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Sub-30 nm FinFETs with Schottky-Barrier Source/Drain Featuring Complementary Metal Silicides and Fully-Silicided Gate for P-FinFETs

机译:带肖特基势垒源/漏极的30nm FinFET,具有互补的金属硅化物和P-FinFet的全硅化栅极

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We investigated the material and electrical characteristics of platinum and ytterbium silicides for potential applications as metallic Schottky-barrier source/drain (S/D) and fully-silicided (FUSI) gate electrodes in fin field-effect transistors (FinFETs). Due to the low electro-negativity parameter of ytterbium, a low temperature silicidation process was developed to avoid the reaction of ytterbium with the isolation regions (i.e. SiO{sub}2 and SiN) to integrate ytterbium silicide successfully in mesa-isolated n-FinFETs. The integration of FUSI metal gate into p-FinFETs was also explored in this work and a novel two-step silicidation process that integrates simultaneously two different phases of platinum silicide with the appropriate work function values for gate electrode and source/drain application was demonstrated.
机译:我们调查了铂和镱硅化物的材料和电气特性,用于潜在应用,作为金属肖特基 - 阻挡源/漏极(S / D)和翅片场效应晶体管(FinFet)中的全硅化(Fusi)栅电极。由于镱的低电否定性参数,开发了低温硅化过程,以避免镱与隔离区(即SiO {} 2和SiN)的反应,以在Mesa隔离的N-FinFET中成功集成Ytterbium硅化物。在该工作中还探索了Fusi金属栅极进入P-FinFET的整合,并进行了一种新的两步硅化方法,其同时与栅电极和源/排水施加的适当工作函数值同时与镀铂硅化物相结合。

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