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High-κ Dielectric Stacks for Nanoscaled SOI Devices

机译:用于纳米型SOI器件的高κ电介质叠层

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The combination of ultra-thin body (UTB), undoped silicon-oninsulator films to control short channel effects and high permittivity (κ) gate dielectric with metal gate to control gate leakage current, can provide a highly scaleable technology to address challenges towards the end of the road map. This paper sets out the basic issues and physics associated with both hi- κ/metal gate and UTB from a device perspective, and establishes the advantages associated with merging the two approaches. A review of the state-of the art devices is undertaken also which serves to emphasize the great potential and progress of this technology.
机译:超薄体(UTB),未掺杂的硅 - OnUnulator膜的组合来控制短信道效应和具有金属栅极的高介电常数(κ)栅极电介质以控制栅极漏电流,可以提供高度可扩展的技术,以解决朝向端的挑战路线图。本文从设备透视中列出了与Hi-κ/金属栅极和UTB相关的基本问题和物理,并建立了与合并两种方法相关的优势。还进行了对最先进的设备的审查,也用于强调这项技术的巨大潜力和进步。

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